Silicon Design Manager, RTL Machine Learning, Accelerator Design
Job description
Silicon Design Manager, RTL Machine Learning, Accelerator Design corporate_fare Google place Sunnyvale, CA, USA bar_chart Advanced Advanced Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain. Google | Sunnyvale, CA, USA Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with Chip Design, ASIC Digital Design, and SystemVerilog. 8 years of experience in Computer Architecture and Register-Transfer Level. 3 years of experience in people management and developing employees. Learn more share Share Silicon Design Manager, RTL Machine Learning, Accelerator Design link Copy link email Email a friend