Technical Lead Manager, Machine Learning, Memory Subsystem Design

Technical Lead Manager, Machine Learning, Memory Subsystem Design corporate_fare Google place Sunnyvale, CA, USA bar_chart Advanced Advanced Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain. Google | Sunnyvale, CA, USA Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 15 years of experience in semiconductor design or design verification. 6 years of experience in people management, developing employees. Experience in designing or verifying DRAM-based memory subsystems. Learn more share Share Technical Lead Manager, Machine Learning, Memory Subsystem Design link Copy link email Email a friend