Senior Silicon Digital Design Engineer, Core IP

Senior Silicon Digital Design Engineer, Core IP corporate_fare Google place Bengaluru, Karnataka, India bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. Google | Bengaluru, Karnataka, India Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques. Experience with ASIC design methodologies for clock domain checks and reset checks. Learn more share Share Senior Silicon Digital Design Engineer, Core IP link Copy link email Email a friend