Digital Design Engineer, RTL IP, Silicon

Digital Design Engineer, RTL IP, Silicon corporate_fare Google place Bengaluru, Karnataka, India bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. Google | Bengaluru, Karnataka, India Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages, such as Verilog or SystemVerilog. Experience with bus protocols such as Advanced Extensible Interface (AXI), Coherent Hub Interface (CHI), AXI Coherency Extensions (ACE) Lite. Experience with multiple SoCs with silicon success and with chip design flow. Learn more share Share Digital Design Engineer, RTL IP, Silicon link Copy link email Email a friend