Package Design Engineer corporate_fare Google place Sunnyvale, CA, USA bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. Google | Sunnyvale, CA, USA Minimum qualifications Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering, Technology, Science, a related field, or equivalent practical experience. 8 years of experience in chip package substrate design using Cadence APD or Mentor Expedition. Experience in chip package substrate layout, design verification, DFM and taping out for production. Experience in design automation and scripting. Learn more share Share Package Design Engineer link Copy link email Email a friend